Speedbin of the chip is in the first 16-bits of the top half of the
64-bit ID. If we don't find a marketing name with the speed bin then
mask it off and try again. Will fix IDs for GPUs that are just binned.
When HOME was unset, nvtop would segfault as in the following trace:
Process terminating with default action of signal 11 (SIGSEGV)
Access not within mapped region at address 0x0
at 0x488B298: strlen (in /usr/libexec/valgrind/vgpreload_memcheck-arm64-linux.so)
by 0x119F33: default_config_path (interface_options.c:48)
by 0x11A5F3: alloc_interface_options_internals (interface_options.c:138)
by 0x10FEBF: main (nvtop.c:209)
We need to handle the unlikely case in which HOME is also unset. On top of
that, default_config_path()'s return value has to be checked in the calling
function to make sure a default config file's path string is only allocated
when != NULL.
Signed-off-by: Adrián Larumbe <adrian.larumbe@collabora.com>
Otherwise nvtop will attempt to toggle them even on systems for which
nvtop was built with Panfrost support, but which possess no Mali GPUs.
This also makes sure the right sysfs profiling hook is touched for every
single Mali GPU in the system, even on SoCs with more than one of
these (yes, those do exist).
Signed-off-by: Adrián Larumbe <adrian.larumbe@collabora.com>
The level of code reduplication between Panthor and Panfrost backends was
outrageous. Factorise all their shared functions and definitions into a
separate library that is only built for these two backends.
Signed-off-by: Adrián Larumbe <adrian.larumbe@collabora.com>
This targets the new generation of ARM Mali CSF mobile GPUs, which for now
comprise the G310 and G610 models.
Most of the code was reused from the Panfrost backend, so there is plenty
of room for refactorisation, which shall be goal of a later changeset.
Signed-off-by: Adrián Larumbe <adrian.larumbe@collabora.com>
Panfrost can provide an approximation of the GFX engine utiliation rate by
relating the number of total process cycles against the maximum device's
operating frequency and the delta between nvtop samples.
Signed-off-by: Adrián Larumbe <adrian.larumbe@collabora.com>
According to Kernel documentation, in
Documentation/gpu/drm-usage-stats.rst, drm-maxfreq-keystr and
drm-cycles-keystr can be used to perform a manual calculation of the
engine's percentage utilization, in cases where the underlying GPU doesn't
support providing this information through a native hardware interface.
However, for its calculations, all fdinfo drm-cycles values for every
single process that has opened the device file must have been retrieved, so
a new gpu vendor struct callback was added to do this right before
gpuinfo_fix_dynamic_info_from_process_info is invoked.
Signed-off-by: Adrián Larumbe <adrian.larumbe@collabora.com>
Populates L2 Cache size, number of shading cores and number of execution
engines GPU fields with data sourced from the GET_PARAM panfrost ioctl().
Signed-off-by: Adrián Larumbe <adrian.larumbe@collabora.com>
Adds a new UI bar with some optional parameters like the number of shader
cores, number of execution engines and size of L2 cache.
Display of this bar is triggered with a program argument.
Signed-off-by: Adrián Larumbe <adrian.larumbe@collabora.com>
Commit af1ff03b7b and
d9004a785f has introduced the correct
uniqueness for Intel and AMD, but the HASH_FIND_CLIENT and
HASH_ADD_CLIENT are still using cid only. This commit fixed this, and
fully resolved#196.
Fixes: #196
